[1] 冯利民,钱照明. 电源去耦方式对数字电路板级EMC性能的影响[J]. 电工技术学报,2007,22(4):14-20. FENG Limin, QIAN Zhaoming. Influence of decoupling approach of power network on EMC performance of digital PCB [J].Transactions of China Electrotechnical Society, 2007, 22(4): 14-20. [2] 侯喆,何凯. 由于IIC总线锁死引起保护装置异常的问题分析[J]. 电力系统保护与控制,2010,38(7):106-108. HOU Zhe, HE Kai. Analysis of protective device error caused by IIC bus lockup [J]. Power System Protection and Control, 2010, 38(7): 106-108. [3] 朱剑,高锦春,黎淑兰. 同轴插接器高频接触阻抗有限元分析[J]. 电工技术学报,2008,23(12):65-69. ZHU Jian, GAO Jinchun, LI Shulan. FEM analysis of high frequency contact impedance in coaxial [J]. Transactions of China Electrotechnical Society, 2008, 23(12): 65-69. [4] 甘云华,周华良,夏雨,等. 高速信号完整性分析及设计在继电保护装置中的应用[J]. 江苏电机工程,2012,31(1):34-38. GAN Yunhua, ZHOU Hualiang, XIA Yu, et al . Application of high-speed signal s integrity analysis and design in device development of relay protection [J]. Jiangsu Electrical Engineering,2012, 31(1): 34-38. [5] 秦德淳,陈雷,蒲有珠. 基于信号完整性分析的阻抗匹配问题研究[J]. 科学技术与工程,2008,8(4):1052-1055. QIN Dechun, CHEN Lei, PU Youzhu. Method research of impedance matching based on analyse of signal integrity[J]. Science Technology and Engineering, 2008, 8(4): 1052-1055. [6] BOGATIN E. 信号完整性分析[M]. 李玉山,李丽平,译. 北京:电子工业出版社,2006. [7] JOHNSON H. High-speed digital design: a handbook of black magic [M]. 北京:电子工业出版社,2004. [8] KIM Youngwoo, KIM Jinho, YANG Haewook. A new via hole structure of MLB (Multi-layered printed circuit board) for RF and high speed systems[C]//Electronic Components & Technology Conference, 2005: 1378-1382. [9] CHANG R W Y, SEE K Y, CHUA E K. Comprehensive analysis of the impact of via design on high-speed signal integrity[C]//9th Electronics Packaging Technology Conference, Cambridge(USA). 2007:262-266. [10] SHIUE G H, GUO W D, LIN C M, et al . Noise reduction using compensation capacitance for bend discontinuities of differential transmission lines[J]. IEEE Trans on Advanced Packaging, 2006, 29(3): 560-569. [11] HALL S H, HECK H L. Advanced signal integrity for high-speed digital designs [M]. USA: Wiley-IEEE Press, 2009. [12] 张志伟. 高速互连总线结构中多平行传输线间的串扰分析与控制[J]. 计算机应用研究,2013,30(12):3729-3731. ZHANG Zhiwei. Analysis and control of crosstalk between multi-parallel transmission lines in high-speed interconnect bus structure[J]. Application Research of Computers, 2013, 30(12):3729-3731. [13] 路宏敏,傅君眉,朱满座,等. 短传输线的串扰响应分析[J]. 西安交通大学学报,2000,34(6):43-47. LU Hongmin, FU Junmei, ZHU Manzuo, et al . Response to the cross-talk over short transmission line[J]. Journal of Xi’an Jiaotong University, 2000, 34(6): 43-47. [14] Micron Technology, Inc. 1Gb:x4,x8,x16 DDR2 SDRAM Featrues [EB/OL]. (2014-07-01)[2016-05-24]. www.micron.com/resource- details/ cb11918f-c142-44e1-bf98-34706ce66d31. [15] Analog Devices, Inc. ADSP-21467/ADSP-21469(Rev B) [EB/OL]. (2013-04-01)[2016-05-24]. www.analog.com/media/en/technical-documentation/data-sheets/ADSP-21467_21469.pdf. |