中国电力 ›› 2021, Vol. 54 ›› Issue (12): 81-85,93.DOI: 10.11930/j.issn.1004-9649.202107055

• 国家“十三五”智能电网重大专项专栏:(十)高压碳化硅器件及应用技术 • 上一篇    下一篇

3 300V SiC SBD嵌入式MOSFET研制

刘国友1,2, 罗海辉1,2, 李诚瞻1,2, 宋瓘1,2   

  1. 1. 新型功率半导体器件国家重点实验室, 湖南 株洲 412001;
    2. 株洲中车时代半导体有限公司, 湖南 株洲 412001
  • 收稿日期:2021-07-03 修回日期:2021-08-26 出版日期:2021-12-05 发布日期:2021-12-16
  • 作者简介:刘国友(1966-),男,博士,高级工程师(教授级),从事功率半导体器件技术研究、产品开发及产业化工作,E-mail:liugy@csrzic.com;罗海辉(1982-),男,博士,高级工程师(教授级),从事功率半导体器件技术研究、产品开发及产业化工作,E-mail:luohy@csrzic.com;李诚瞻(1979-),男,博士,高级工程师(教授级),从事宽禁带化合物半导体器件研究与开发工作,E-mail:licz@csrzic.com;宋瓘(1991-),男,硕士,助理工程师,通信作者,从事碳化硅功率半导体器件研发工作,E-mail:songguan@csrzic.com
  • 基金资助:
    国家重点研发计划资助项目(2016YFB0400503)

R&D of 3 300V SiC MOSFET With Embedded SBD

LIU Guoyou1,2, LUO Haihui1,2, LI Chenzhan1,2, Song Guan1,2   

  1. 1. State key Laboratory of Advanced Power Semiconductor Devices, Zhuzhou 412001, China;
    2. Zhuzhou CRRC Times Semiconductor Co., Ltd., Zhuzhou 412001, China
  • Received:2021-07-03 Revised:2021-08-26 Online:2021-12-05 Published:2021-12-16
  • Supported by:
    This work was supported by the National Key Research and Development Program of China (No.2016YFB0400503).

摘要: 研制了一种3 300 V 碳化硅(silicon carbide, SiC) 肖特基二极管(schottky barrier diodes,SBD)嵌入式金属-氧化物半导体场效应晶体管(metal-oxide-semiconductor field effect transistors,MOSFET),即在传统MOSFET结构中集成一个由钛形成的肖特基接触。在芯片制造过程中,通过增加Ni退火后的表面处理工艺,使得栅源短路失效率降低约58%。研究发现,当二极管电流密度JSD=100 A/cm2时,嵌入式二极管电压降VSD(SBD)=2.1 V,寄生二极管的开启电压约为8 V,这说明嵌入式SBD可以抑制MOSFET寄生二极管开启,降低碳化硅MOSFET“双极退化”风险。另外,该芯片的阈值电压为3.05 V,比导通电阻和阻断电压分别为18.9 mΩ·cm2和3 955 V,在高压轨交市场具有广阔的应用前景。

关键词: 碳化硅, SBD, MOSFET, 寄生二极管, 双极退化

Abstract: In this paper, a 3 300 V silicon carbide(SiC) metal-oxide-semiconductor field effect transistors (MOSFET) with embedded schottky barrier diodes(SBD) is developed, where the traditional MOSFET structure is integrated with a titanium-formed Schottky contact. The optimized surface treatment procedure after nickel annealing is adopted to improve the leakage performance of gate-source in the chip manufacturing process, which contributes to a 58% reduction in gate-source short circuit failure rate. It is found that the switch-on voltage of parasitic diode is about 8V, when the diode current density (JSD) reaches 100 A/cm2, the voltage drop of SBD (VSD(SBD)) is 2.1V, which indicates the effectiveness of the embedded SBD in suppressing the parasitic diode turn-on and reducing the bipolar degradation risk of MOSFET. In addition, the threshold voltage of the chip is 3.05V, and the specific on-resistance and blocking voltage are 18mΩ·cm2 and 3 955V respectively, suggesting a broad application prospect in the high-voltage rail transit market.

Key words: silicon carbide, SBD, MOSFET, parasitic diode, bipolar degradation